1. Field of the Invention
The present invention relates to a driving voltage controller of sense amplifiers for a memory device, and more particularly to a driving voltage controller of sense amplifiers for a memory device which prevents the sense amplifier from being over-driven when an external power voltage is used for an internal driving voltage of the sense amplifier.
2. Description of the Prior Art
As generally known in the art, in order to read out data stored in a memory cell in a memory device such as a dynamic random access memory (referred to as a “DRAM” hereinafter), word lines are enabled and a charge stored in the memory cell is transferred to a true bit line BL and a complementary bit line /BL. A sense amplifier senses and amplifies a minute potential difference between the true bit line BL and the complementary bit line /BL. Then the sense amplifier transits a voltage on the true bit line BL to a high level, and transits a voltage on the complementary bit line /BL to a low level.
As a potential difference between the true bit line BL and the complementary bit line /BL becomes rapidly greater, a data output time through a data output buffer is shortened to allow the memory device to be operated at a high speed. In order to obtain a great potential difference between the true bit line BL and the complementary bit line /BL, it is necessary that a driving voltage of the sense amplifier be maintained in a high level for a predetermined time (namely, during a sensing operation). Conventionally, during the sensing operation, an external supply power is used as a core voltage Vcore which is used for a driving voltage of the sense amplifier. The sensing operation requires a significant power consumption.
FIGS. 1A and 1B are views for illustrating an operation of a conventional sense amplifier in a memory device.
As shown in FIGS. 1A and 1B, after a word line is enabled at a high level, a potential difference between the bit lines occurs. The sense amplifier senses the occurrence of the potential difference between the bit lines and starts a sensing operation. At this time, a sense enable bar signal sense_enb is maintained at a low level for a predetermined time to drive a core voltage driver. The sense enable bar signal sense_enb is a signal which controls a core voltage driver. The core voltage driver turns on a PMOS transistor which functions as a switch for an external voltage supply. Accordingly, a level of the core voltage is increased to a level of an external power voltage. As stated above, the core voltage is used for the driving voltage of the sense amplifier.
FIG. 1B shows a change process of a driving voltage of the sense amplifier, namely, the core voltage Vcore.
A great deal of energy is instantaneously consumed during sensing and amplifying operations between the true and complementary bit lines BL and /BL by the sense amplifier to rapid drop a level of the core voltage which is a driving voltage of the sense amplifier. Although an external power voltage is applied to generate the core voltage by a core voltage driver during the sensing operation, current consumption due to the sensing operation is too great. It does not prevent a rapid reduction of the core voltage.
However, during a predetermined time, namely, while a core voltage driver is enabled, the external power voltage is applied to generate the core voltage which functions as the driving voltage of the sense amplifier. As shown in FIG. 1b, accordingly, the core voltage is rapidly increased to and maintained at a level of the external power voltage.
In this case, when the external power voltage Vext is low (Low Vext; for example, when a standard external power voltage is 2.5 V, a voltage of about 2.1 V is supplied in practice), in order to supply a sufficient voltage to the sense amplifier S/A, a PMOS transistor should have a significant size. The PMOS transistor is a driving transistor which transfers the external power voltage Vext. Accordingly, when the external power voltage is high (High Vext; for example, when a standard external power voltage is 2.5 V, a voltage of about 4 V is supplied in practice), the core voltage is increased to an excessively high level (FIG. 1B). Such a case produces problems as follows.
First, when the core voltage is increased beyond a threshold value thereof, a sensing current of the sense amplifier is increased and causes a unnecessary power consumption to occur.
Second, the core voltage is also used for a bit line precharge voltage. Accordingly, when the level of the core is too high, the level of the bit line precharge voltage is relatively high. Thus, an unexpected erroneous operation occurs during operation of the sense amplifier.